Cell Architecture Explained Version 2

Part 5: Conclusion and References

Short Overview

The Cell architecture consists of a number of elements:

The Cell Processor

This is a 9 core processor, one of these cores is a PowerPC and acts as a controller.  The remaining 8 cores are called SPEs and these are very high performance vector processors.  Each SPE contains it's own block of high speed RAM and is capable of 32 GigaFlops (32 bit).  The SPEs are independent processors and can act alone or can be set up to process a stream of data with different SPEs working on different stages.  This ability to act as a "stream processor" gives access to the full processing power of a Cell which is claimed to be more than 10 times higher than even the fastest desktop processors.

In addition to the raw processing power the Cell includes a high performance multi-channel memory subsystem and a number of high speed interconnects for connecting to other Cells or I/O devices.

Distributing Processing

A software infrastructure under development will allow Cells to work together.  While they can be directly connected via the high speed interconnects they can also be connected in other ways or distributed over a network.  The Cells are not gaming or computer specific, they can be in anything from PDAs to TVs but they can still be used to act as a single system.

Parallel programming is usually complex but in this case the OS will look at the resources it has and distribute tasks accordingly, this process does not involve any more programming than the initial parallelisation.  If you want more processing power you simply add more Cells, you do not need to replace the existing ones as the new Cells will augment the existing ones.

Overall the Cell architecture is an architecture for distributed, parallel processing using very powerful computational engines developed using a highly aggressive design strategy.  These devices shall be produced in vast numbers so they will provide vast processing resources at a low cost.


The rule in the PC world has always been “evolution not revolution”, often simply incorporating features from other platforms.  The changes are incremental and produce incremental performance boosts.

Cell is a revolution, a completely new microprocessor architecture which, while it may take some time to get used to, promises a vast performance boost over today’s systems.  GPUs can already run 10 times faster than desktop CPUs, Cell will not only bring similar performance but will do so for more applications and it’ll be easier to program.

Being produced in large volumes also means the Cell will be cheap.  They will likely see wide spread not just in living rooms but but in the realm of industry and science as well.  The embedded world is much, much larger than the PC world and often imposes stringent constraints on the components used, the same sort of constraints the Cell has been designed for.

Some have suggested that STI should have gone for a more conventional design such as three PowerPC 970s on a single chip.  Such a design would not have addressed the power issues and would, as a result have to of been driven at a relatively low clock rate.  Instead, by using simpler designs which use vectors the Cell designers have managed to fit 9 cores on a single chip at a higher clock speed, the potential performance is consequently considerably higher.

The Cell is a new architecture and will seem strange and alien to many used to rather more conventional desktop designs.  In order to utilise it properly programers will have face new problems and devise new ways of solving them.  It remains to be seen how much of the Cell’s potential can be achieved and how difficult it is to extract it, but it’s clear that STI are trying to make this as painless as possible.

Many people do not like change, to them Cell represents a threat.  For others it represents an opportunity.

Lets see how many take the opportunity, and what other opportunities the other CPU vendors come up with in response.


Many thanks the people who took the time to review this article and the people who put me in touch with them.

I’d also like to thank the people who responded to the previous version, I wasn’t able to respond to many of the e-mails but I did read them all.

Further Reading

There are numerous other articles and papers around the web which cover the Cell:

Ars Technica



Microprocessor Report


Real World Tech





IBM Research Paper


Various other IBM papers




The original Cell patent application by Masakazu Suzuoki and Takeshi Yamazaki of Sony Computer Entertainment inc.


[Kutaragi] Interview with Sony's Ken Kutaragi



[3rd party]

The 3 STI companies can sell cell to their own customers.



GPUs have be measured at 10 ties faster than conventional CPUs.



256 = 8 (SPEs) x 4GHz x 4 (32 bit words in a vector) x 2 (multiply-adds are counted as 2 operations).

The Top500 supercomputer list counts double precision GFLOPS so these are not comparable.

[Amdahl's law]



IBM’s Hypervisor used to validate the Cell.



IBM's OS/400 is said to be capable of running on a Cell.



What is vector processing?



Vectorisation in GCC






ACM Queue on Streaming Processors



Interesting paper on GPUs and clustering them to produce very high performance systems

http://www.cs.sunysb.edu/~vislab/projects/urbansecurity/GPUcluster_SC2004.pdf  (Pdf)


GPUs can be used for general purpose computations.  Most if not all of these applications will also be work on a Cell.

http://www.gpgpu.org /

http://www.shadertech.com /


Sony and Toshiba licensed Rambus technology for use in the Cell.







Optical interconnects in silicon


[AltiVec/VMX] Also known as Velocity Engine or VMX.



Cell Development Slides.


[BPA] Experimental patch set to intro Cell to Linux kernel, it’s referred to here as the “BPA” (Broadband processor Architecture).


[Dev] Supports for development tools is being added.



Linux on Cell uses a virtual file system for SPU communications.




Presentation on programming and an example of large (and fast!) FFTs on Cell (791KB).




(see about the author below).


The removed article generated a lot of controversy, this covers the relevant issues.



Alan Cox


Some good comments on writing good software:



Lengthy paper on processor performance limits



1GHz PowerPC in 1997




Ultra high frequency microarchitecture at IBM Research



Evaluating CPU performance (IPC graphs)



The low number of registers in x86 CPUs necessitates more aggressive OOO hardware.

Removing it will thus have a larger performance impact than on PowerPC based CPUs.



The Cell was designed with low power consumption in mind.

http://www.hpcaconf.org/hpca11/papers/25_hofstee-cellprocessor_final.pdf .

Miscellaneous Notes:

Fanboi hyp3.

Contrary to some opinions the first version was not an attempt to hype the Cell processor.

The original version of this was written after I read a debate on the Cell in late 2004.  The Cell was clearly not widely understood at the time and I felt I could provide an explanation.

I am a technology enthusiast and when I see some very advanced technology heading in our direction I’m interested and I’m excited.  Some of this emotion evidently made it into the first version of the article.

Neither this or the previous version was requested or paid for by Sony, Toshiba, IBM or anyone else.

About the Author

Nicholas Blachford lives in Paris.

He is currently (slowly) learning French and designing / writing a softsynth for OS X.

He is “talking to” Cell-Industries.

You might find him hanging about at whyzzat .

Introduction and Index

Part 1: Inside The Cell

Part 2: Again Inside The Cell

Part 3: Programming the Cell

Part 4: Revenge of the RISC

Part 5: Conclusion and References

© Nicholas Blachford 2005.